The CS signals are initialized after the spi. Above is a plot of the signals - i recorded the first three spi transfers - two with cs0 and one with cs1 - both set manually.
As you can see in line cs1 - it is always activated with each byte, but never manually framing 3 spi_bytes.
Here is my initialisation-code with all three transfers (two times SPI_WRITE and one for cs1 afterwards).
Maybe you can see something.
Stefan
#include "mraa.h"
mraa_spi_context spi;
mraa_gpio_context gpio_cs0;
mraa_gpio_context gpio_cs1;
mraa_i2c_context i2c0;
mraa_uart_context uart;
uint8_t display_mode;
uint16_t SPI_write(uint8_t reg, uint8_t dh, uint8_t dl)
{
uint8_t buf[3];
buf[0]=reg;
buf[1]=dh;
buf[2]=dl;
mraa_gpio_write(gpio_cs0, 0);
mraa_spi_transfer_buf(spi,&buf[0],&buf[0],3);
mraa_gpio_write(gpio_cs0, 1);
return(((buf[1]<<8) | buf[2]));
}
void UTFT::_hw_special_init()
{
display_mode = 0;
mraa_init();
mraa_set_priority(99);
mraa_gpio_context gpio_done = mraa_gpio_init(48); //15
mraa_gpio_context gpio_init = mraa_gpio_init(36);//14
mraa_gpio_context gpio_prog = mraa_gpio_init(15); //165
mraa_gpio_dir(gpio_init, MRAA_GPIO_IN);
mraa_gpio_dir(gpio_done, MRAA_GPIO_IN);
mraa_gpio_dir(gpio_prog, MRAA_GPIO_IN);
spi = mraa_spi_init(0);
gpio_cs0 = mraa_gpio_init(23);
gpio_cs1 = mraa_gpio_init(14);
mraa_gpio_mode(gpio_cs0, MRAA_GPIO_STRONG);
mraa_gpio_mode(gpio_cs1, MRAA_GPIO_STRONG);
mraa_gpio_dir(gpio_cs0, MRAA_GPIO_OUT);
mraa_gpio_dir(gpio_cs1, MRAA_GPIO_OUT);
mraa_gpio_write(gpio_cs0, 1);
mraa_gpio_write(gpio_cs1, 1);
SPI_write(0x01,0x00,0x01);
uint8_t dip_sw;
dip_sw=SPI_write(0x87,0x00,0x00);
flip_x = (dip_sw>>0) & 0x01;
flip_y = (dip_sw>>1) & 0x01;
uint8_t buf[3];
buf[0]=0x85;
buf[1]=0;
buf[2]=0;
mraa_gpio_write(gpio_cs1, 0);
mraa_spi_transfer_buf(spi,&buf[0],&buf[0],3);
mraa_gpio_write(gpio_cs1, 1);
i2c0 = mraa_i2c_init(1);
mraa_i2c_address(i2c0,0x55);
mraa_i2c_write_byte(i2c0,0xA9);
uart = mraa_uart_init(0);
system("/bin/stty < /dev/ttyMFD1 115200");
int fd = open("/dev/ttyMFD1",O_RDWR);
write(fd,"X",1);
}